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Avirup Dasgupta

Avirup Dasgupta

Assistant Professor

avirup@ece.iitr.ac.in
01332 28-4967
My Website

  • Semiconductor devices: Physics, analysis and design
  • Modeling: Compact modeling (SPICE simulations) and numerical modeling (TCAD)
  • Nanobiotechnology: Genome detection



From To Designation Organisation
Jan. 2017 Apr. 2017 Intern GlobalFoundries
Sep. 2018 Dec. 2020 Postdoctoral scholar University of California Berkeley
Dec. 2019 Dec. 2020 Manager Berkeley Device Modeling Center
Jan. 2021 present Assistant professor Indian Institute of Technology Roorkee
Award Institute Year Awarded
Distinctive performance award National Science Olympiad 2007
NTSE scholar National Talent Search Examination (NTSE) 2008
Top 10% National Standard Examination in Chemistry 2008
Top 1% National Standard Examination in Physics 2008
AIR: 155 IIT-JEE 2009
Gold-leaf Award IEEE Asia Pacific Conference on Postgraduate Research 2013
Best poster award IEEE International Conference on Emerging Electronics 2015
DST Travel Grant for Int. Symp. on Compound Semiconductors, UCSB Dept. of Science and Technology, Govt. of India 2015
Outstanding TA award Dept. of Electrical Engineering, IIT Kanpur 2015
Industry standardization of ASM-HEMT Comacpt Model Coalition 2017
Best paper award IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) 2018
Golden reviewer IEEE Transactions on Electron Devices 2018, 2019, 2020
Golden reviewer IEEEE Electron Device Letters 2019, 2020
Degree Subject University Year Studied
B.Tech Electrical Engineering Indian Institute of Technology Kanpur 2014
M.Tech Electrical Engineering (Semiconductor device modeling) Indian Institute of Technology Kanpur 2014
Ph.D. Electrical Engineering (Semiconductor device modeling) Indian Institute of Technology Kanpur 2018
From To Designation Organisation Level
Dec. 2019 Dec. 2020 Manager Berkeley Device Modeling Center -
Dec. 2019 Dec. 2020 Lead developer BSIM Group, Univeristy of California Berkeley -
2021 2021 Member High Performance Computing committee, D/o ECE -
Membership Details
IEEE
IEEE Electron Devices Society
IEEE Young Professionals
IEEE Nanotechnology Council
IEEE International Roadmap for Devices and Systems (IRDS) Community
Berkeley Device Modeling Center (BDMC)
Silicon Integration Initiative (Si2)
Compact Modeling Coalition (CMC)
Editorial board, Frontiers in Electronics
Title Course Code Course Semester
Simulation Lab-I ECN-576 M.Tech (1st year) Spring
Digital Electronics and Circuits Laboratory ECN-252 UG (2nd year) Spring
Topic Scholar Name Status of PhD Registration Year
Please visit https://faculty.iitr.ac.in/ece/avirup/ for latest details. - - -
Title Place Date Delivered
Design Considerations and Compact Modeling of GAAFETs for Upcoming Technology Nodes (Keynote, Invited) AICTE Workshop, NIT Meghalaya 23 Feb. 2021
Design and Modeling of Nanosheet FETs (Invited) IITK Short Course 2021 24 Feb. 2021
Compact Modeling for Gate-All-Around FET Technology (Invited) MOS-AK 25 Feb. 2021
Topic Organisation Level
Development of industry standard compact models: BSIM-CMG, BSIM-IMG, BSIM-BULK, BSIM-SOI, BSIM4 University of California Berkeley, Compact Model Council, Berkeley Device Modeling Center
Compact modeling of emerging devices University of California Berkeley, Berkeley Device Modeling Center
Compact model for STT-MRAM GlobalFoundries, IIT Kanpur, Berkeley Device Modeling Center
Development of ASM-HEMT Compact Model Council, University of California Berkeley, IIT Kanpur, NTNU Norway, Macquarie university, Univ. of South Florida
Understanding transport in advanced devices Intel, IIT Kanpur
IITK-RPTM compact model Silvaco, IIT Kanpur
Compact modeling of multi-gate FETs Semiconductor Research Corporation, University of California Berkeley, IIT Kanpur
GaN HEMTs Universite de Lille
Nanowire, GAAFETs IMEC Belgium

Complete list of publications available at: https://faculty.iitr.ac.in/ece/avirup/

Total Citations
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